The invention relates to a method and an apparatus in a telecommunication system for considerably reducing the power consumption particularly in a telephone system comprising time-space type switches realized in CMOS-technique.
A known time switch is shown e.g. in U.S. Pat. No. 4,858,227. The known switch is so designed that information from any switch input can be coupled to any switch output under control by a control memory.
In today's time-space type switches the large power consumption is one of the major problems particularly when the switch matrix increases. The problem is due to the fact that the number of memory cells for storing information to be coupled through the switch, increases quadratically with the number of inputs and outputs.
A time-space switch is realized by means of memories, discrete or integrated in the form of application specific integrated circuits. This means that an input signal is copied to a number of memory cells, which is equal to the number of possible output signals from the switch. This is also the case when the input signal is to be transferred only to a single output. As mentioned above, due to this fact the power consumption increases in principle quadratically to an unacceptably high level.
As is apparent from the known apparatus a certain reduction of the power consumption is accomplished by simplifying the circuits and by reducing the number of circuits. This is also common in other known embodiments but gives just a minor reduction of the power consumption. Thus, a major part of the problem remains.